(a) Field of the Invention
The present invention relates to a semiconductor device having a cylindrical capacitor and, more particularly, to a semiconductor device having a larger-capacitance cylindrical capacitor.
The present invention also relates a method for manufacturing a semiconductor device having such a cylindrical capacitor.
(b) Description of the Related Art
A DRAM device has an increasing number of memory cells by employing a reduced design rule. The reduced design rule inevitably reduces the occupied area of each memory cell, and thus requires a reduced occupied area for a stacked capacitor used in the memory cell without reducing the capacitance thereof. A cylindrical capacitor is generally used as the stacked capacitor for storing data in a memory cell, to achieve a reduced occupied area and yet a larger capacitance. The cylindrical capacitor is formed in a cylindrical hole formed in a thick insulation film (container insulation film). A larger depth for the cylindrical hole provides a larger capacitance for the stacked capacitor.
FIG. 5 shows a conventional DRAM device having a cylindrical capacitor, described in Patent Publication JP-2002-110674A. The DRAM device 100 includes an interlevel dielectric film 101 overlying a semiconductor substrate (not shown), and a thick insulation film 103 formed thereon and having a cylindrical hole 104 for receiving a cylindrical capacitor. The cylindrical capacitor includes a bottom electrode 105 formed on the surface of bottom and sidewall of the cylindrical hole 104, a capacitor insulation film 106 formed on the bottom electrode 105 and on top of the thick insulation film 103, and a top electrode 107 formed on the thick insulation film 103 and filling the cylindrical hole 104 to oppose the bottom electrode 105 with an intervention of the capacitor insulation film 106. The bottom electrode 104 is connected to a diffused region of the semiconductor substrate via a contact plug 102 penetrating the interlevel dielectric film 101.
FIG. 6 shows another type of the cylindrical capacitor, described in Patent Publication JP-2000-332216A. The stacked capacitor in the DRAM device 110 includes a first capacitor section 111 received in a thick insulation film 103 and a second capacitor section 112 protruding from the thick insulation film 103. The top electrode 107 in the second capacitor section 112 includes a plug portion filling the cylindrical hole 104 to oppose the inner surface of the bottom electrode 105 of the first and second capacitor sections 111 and 112, and an outer portion opposing the outer surface of the bottom electrode 105 of the second capacitor section 112.
The DRAM device 110 includes a bottom electrode having a larger thickness compared to the bottom electrode of the DRAM device 100 of FIG. 5, for increasing the mechanical strength of the bottom electrode 105 especially in the second capacitor section 112 at the stage before forming the top electrode 107.
In the structure of the DRAM devices 100 and 110 described in the above publications, the cylindrical hole 104 may have an aspect ratio of 20 or higher, assuming that the DRAM device has a design rule of, for example, “F80” wherein the half pitch of word lines and bit lines of the DRAM devices is 80 nm.
It is considered that an aspect ratio of 20 or higher prevents the dry etching for forming the cylindrical hole 104 from effectively etching the thick insulation film 103 especially in the vicinity of the bottom of the cylindrical hole 104. This is because the cylindrical hole 104 has a reduced diameter toward the bottom of the cylindrical hole 104 having such an aspect ratio, and the reduced diameter eventually results in stop of the etching itself. Thus, it is desired to form a cylindrical hole having an aspect ratio of 20 or higher without involving such a reduced diameter or the stop of the etching.